World Class SystemVerilog & UVM Training
SYSTEMVERILOG FUNDAMENTALS - COURSE INFORMATION PAGE
4-Half-Day SystemVerilog Fundamentals Training - Apr 16-19, 2024
Paradigm Works is sponsoring open enrollment SystemVerilog training by award-winning
SystemVerilog & UVM trainer, presenter and author, Cliff Cummings.
The training is offered as half-day classes to allow engineers from India to North America to
attend. Lectures typically lasts 2.5-3 hours each day. Cliff will also set aside 1 hour before class
and 1+ hours after class to help with labs and answer questions.
LECTURE SCHEDULE
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Lecture/Labs scheduled for India time zones - 7:30 pm - 10:30 pm IST
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Lecture/Labs scheduled for Central Europe time zones - 4:00 pm - 7:00 pm CEST
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Lecture/Labs scheduled for Eastern U.S. time zones - 10:00 am - 1:00 pm EDT
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Lecture/Labs scheduled for Pacific U.S. time zones - 7:00 am - 10:00 am PDT
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Additional Lab Time - Cliff will be on the WebEx call 1 hour before lecture and stay for 1 additional hour after lecture.
COURSE MATERIALS
All materials will be provided as color, searchable, protected PDF files with a 5-year license, and are accessible on laptops running Windows 7 and above.
When enrolling, students need to share their email address and the country where they are located for Paradigm Works to generate the licensed electronic materials.
LABS & TOOLS
Lab files will be provided for download. Students are encouraged to use their own tools to run the labs to gain experience with their preferred tool set.
There are a limited number of training logins that can be provided by Paradigm Works for this training class. Notify Michael Hoyt if you need access to one of the Paradigm Works accounts for training.
PRICING & REGISTRATION
For course Pricing and Registration, visit the web page:
paradigm-works.com/training-courses-menu
COURSE CONTENT AND SCHEDULE
For information on the course content and schedule, download in the following PDF document:
(NOTE: class is taught as 4 half-day sessions):
Systemverilog_Fundamentals_2day_training.pdf